The European Processor Initiative will be realized in two projects (EPI SGA1 and EPI SGA2).

The EPI SGA1 project will be the first phase of the European Processor Initiative FPA, whose aim is to design and implement a roadmap for a new family of low-power European processors for extreme scale computing, high performance Big-Data and a range of emerging applications. 

EPI SGA1 will:

• Develop the roadmap for the full length of the EPI initiative
• Develop the first generation of technologies through a co-design approach (IPs for general-purpose HPC processors, for accelerators, for trusted chips, software stacks and boards)
• Tape-out of the first generation chip by integrating the IPs developed
• Validate this chip in the HPC context and in the automotive context using a demonstration platform

The project will deliver a high performance, low power processor, implementing vector instructions and specific accelerators with high bandwidth memory access. The EPI processor will also meet high security and safety requirements. This will be achieved through intensive use of simulation, development of a complete software stack and tape-out in the most advanced semiconductor process node. SGA1 will provide a competitive chip that can effectively address the requirements of the HPC, AI, automotive and trusted IT infrastructure markets.

Digital sovereignty has become a key requirement for the EU, which is now striving to move from a simple user of ICT technologies to a main player on the digital market, both for products and human skills. Also, the need for EU (and the EuroHPC JU) to deploy Europe world-class exascale supercomputers is urging. The European Processor Initiative develops a roadmap for future European high-performance low power processors aligned with the EuroHPC roadmap.

EPI focuses on processor technologies based on ARM ISA and architecture for covering the short term needs and HPC accelerator technologies based on RISC-V, the open-source ISA. RISC-V is also candidate to become the Europea's own technologies for covering long term objectives. SGA2 also seeks to expand the scope of the project into adjacent European and global vertical markets that can leverage HPC to enable new and improved systems and solutions.

The present EPI SGA2 proposal, built on top of EPI SGA1 represents the second step toward the implementation of this roadmap. This second step will have a three-year duration with the following objectives:

• Finalize the development and the bring-up of the first generation of low-power processor units developed in SGA1,
• Develop the second generation of the General Purpose Processor (GPP) applying technological enhancements targeting the European Exascale machines with respect to the GPP (Rhea) of SGA1,
• Develop the second generation of low-power accelerator test chips, usable by the HPC community for tests and finally
• Develop sound and realistic industrialisation & commercialisation paths and Enable long-term economical sustainability with an industrialization path in the edge computing area, demonstrated in a few well-chosen proofs of concepts like autonomous shuttles or video surveillance.